TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 538

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Signal Name
LCP0 signal
LVSYNC signal
LGOEn signal
FR signal
LCP0 signal
LD23-LD0 signal
LDINV signal
LHSYNC signal
LLOAD signal
LLOAD signal
3.19.3.7 Signal Settings
This section explains how to control each of these signals.
The above diagram shows the typical timings of the signals controlled by the LCDC.
Front dummy LHSYNC
(Vertical front porch)
92CF26A-536
Valid LHSYNC
(Common size)
Back dummy LHSYNC
(Vertical back porch)
TMP92CF26A
2009-06-25