TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 321
TMP92xy26AXBG
Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY26AXBG.pdf
(768 pages)
Specifications of TMP92xy26AXBG
Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
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3.14.2
Operation of Each Circuit
(1) Prescaler
selecting the baud rate generator as the serial transfer clock.
among the prescaler outputs.
fc
−
There is a 6-bit prescaler for generating a clock to SIO0. The prescaler can be run by
Table 3.14.1 shows prescaler clock resolution into the baud rate generator.
The baud rate generator selects between 4-clock inputs: φT0, φT2, φT8, and φT32
Table 3.14.1 Prescaler Clock Resolution to Baud Rate Generator
<GEAR2:0>
Clock gear
SYSCR1
100(1/16)
000(1/1)
001(1/2)
010(1/4)
011(1/8)
1/4
−
92CF26A-319
φT0 (1/1)
fc/16
fc/32
fc/64
fc/4
fc/8
Baud Rate Generator input clock
BR0CR<BR0CK1:0>
φT2 (1/4)
fc/128
fc/256
fc/16
fc/32
fc/64
SIO Prescaler
φT8 (1/16) φT32 (1/64)
fc/1024
fc/128
fc/256
fc/512
fc/64
fc/1024
fc/2048
fc/4096
fc/256
fc/512
TMP92CF26A
2009-06-25
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