TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 433

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Receive SETUP token
Confirm Status
Confirm DATA PID
• Error
• Confirm receving data
Normal finish transaction
• Set DATASET register
• Assert INT_SETUP and request flag
• According to stage flow, prepare for next stage
• Set STATUS to DATAIN
• Set toggle bit to 1
Transmit ACK
Receive data
Confirm Token packet
• DATA0
• Time out
OK
• Confirmation STATUS register (Status)
OK
OK
OK
OK
number
• PID
• Address
• Endpoint
• Transfer mode
• Error
IDLE
Figure 3.16.5 Control Flow in UDC (Setup stage)
Except DATA0 PID
Time out
Error, more than payload data comunication
Error
92CF26A-431
Invalid
Error transaction
• Set STATUS to RX_ERR
• Put back FIFO address point
TMP92CF26A
2009-06-25