TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 139

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.7.10
input or output. Resetting sets PF0 to PF5 to be input ports. It also sets all bits of the
output latch register to “1”. In addition to functioning as general-purpose I/O port pins,
PF0 to PF5 can also function as the output for I
writing a “1” to the corresponding bit of the Port F Function Register (PFFC).
general-purpose output port, PF7 can also function as the SDCLK output. Resetting sets
PF7 to be an SDCLK output port.
(1) Port F0 (I2S0CKO), Port F1 (I2S0DO), Port F2 (I2S0WS), Port F3 (I2S1CKO), Port F4
Port F (PF0 to PF5, PF7)
Ports F0 to F5 are 6-bit general-purpose I/O ports. Each bit can be set individually for
Port F7 is a 1-bit general-purpose output port. In addition to functioning as
(I2S1DO), Port F5 (I2S1WS)
pin is detailed below.
Ports F0 to F5 are general-purpose I/O port. They also function as either I
PF0
PF1
PF2
(Word-select output)
(I
(Clock output)
2
(Data output)
S0 Module)
I
I2S0CKO
2
I2S0WS
I2S0DO
Smode
92CF26A-137
PF4
PF5
PF6
2
S0, I
(Word-select output)
2
S1. A pin can be enabled for I/O by
(I
(Clock output)
2
(Data output)
S1 Module)
I
I2S1CKO
2
I2S1WS
I2S1DO
Smode
TMP92CF26A
2009-06-25
2
S. Each