TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 650

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
(3) Limitations in debug mode
*If reset from the microcontroller by the RESET pin may clash the register information and internal RAM data
in the CPU, including not only programs but also breakpoint and trace information.
1) Target reset
Debug mode has the following limitations:
(microcontroller) must not be used to reset the controller and microcontroller.
Instead, reset should be performed from the controller. (For details, please refer to
the instruction manual of the emulation pod to be used.)
While debugging is being performed, the system reset (
92CF26A-648
RESET
pin) of the target
TMP92CF26A
2009-06-25

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