TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 328

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Timing to writing to the
transmission buffer
Note 1: If the
Note 2: Transmission starts on the first falling edge of the TXDCLK clock after the
TXDCLK
CTS0
SIOCLK
TXD
transmission.
Handshake function
(1)
errors can be avoided. The handshake functions is enabled or disabled by the
SC0MOD<CTSE> setting.
transmission is halted until the
interrupt is generated, and it requests the next data send to from the CPU. The
next data is written in the transmission buffer and data sending is halted.
setting any port assigned to be the
“high” to request send data halt after data receive is completed by software in the
RXD interrupt routine.
CTS
Use of
When the
Though there is no
Send is suspended
from (1) and (2)
0
signal goes High during transmission, no more data will be sent after completion of the current
TMP92CF26A
CTS0
Sender
Figure 3.14.5
13
CTS0
Figure 3.14.4 Handshake function
CTS0
pin allows data can to be sent in units of one frame; thus, overrun
TXD
14
(2)
pin goes high on completion of the current data send, data
15
RTS
92CF26A-326
CTS
16
0
pin, a handshake function can be easily configured by
(Clear to send) Timing
1
CTS0
Start bit
2
RTS
pin goes low again. However, the INTTX0
3
function. The
RXD
RTS
TMP92CF26A
Receiver
(Any port)
14
CTS
15
0
signal has fallen.
RTS
16
should be output
1
TMP92CF26A
2009-06-25
bit0
2
3