TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 279

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
TA67RUN
(1118H)
TA45RUN
(1110H)
Bit symbol
Read/Write
Reset State
Function
Bit symbol
Read/Write
Reset State
Function
Note: The values of bits 4 to 6 of TA45RUN are “1” when read.
Note: The values of bits 4 to 6 of TA67RUN are “1” when read.
TA4REG double buffer control
TA6REG double buffer control
Double
buffer
0: Disable
1: Enable
Double
buffer
0: Disable
1: Enable
0
1
0
1
TA4RDE
TA6RDE
R/W
R/W
7
Disable
Enable
7
Disable
enable
0
0
6
6
Figure 3.12.7 Register for TMRA
TMRA45 RUN Register
TMRA67RUN Register
92CF26A-277
5
5
4
4
In IDLE2
mode
0: Stop
1: Operate
In IDLE2
mode
0: Stop
1: Operate
I2TA45
I2TA67
3
3
0
0
TMRA45
prescaler
0: Stop and clear
1: Run (Count up)
TMRA67
prescaler
0: Stop and clear
1: Run (Count up)
TA45PRUN
TA67PRUN
2
2
0
0
R/W
R/W
Up counter
(UC5)
Up counter
(UC7)
Count control
Count control
TA5RUN
TA7RUN
0
1
0
1
1
0
1
0
Stop and clear
Run (Count up)
Stop and clear
Run (Count up)
TMP92CF26A
2009-06-25
Up counter
(UC4)
Up counter
(UC6)
TA4RUN
TA6RUN
0
0
0
0

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