TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 18

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Power
1.5V
Power
3.3V
1.5-V rails should be
turned on first,
followed by the 3.3-V
rails.
PWE terminal
DVCC3A
DVCC3B
AVCC
DVCC1A
DVCC1B
DVCC1C
RESET
Note1: Although it is possible to turn on or off the 1.5-V and 3.3-V power supply rails simultaneously, it may cause
Note2: In the power-on sequence, the 3.3-V power supply rails must not be turned on before the ones of 1.5-V . In the
3.3V power with 1.5V power is supplied.
This LSI has the restriction for the order of supplying power. Be sure to supply external
When Powering on
external pins to temporarily become unstable. Therefore, if there is any possibility that this would affect
peripheral devices connected with the TMP92CF26A, external power supplies should be turned on or off while
the internal power supplies are stable, as indicated by the heavy lines in the diagram above.
power -off sequence, the 3.3-V power supply rails must not be turned off after the ones of 1.5-V.
Power should rise and
stabilizes within 100 ms.
Figure 3.1.2 Power on Reset Timing Example
High-frequency Oscillation Stabilizing Time
＋20 system clock cycles
92CF26A-16
Power Cut Mode (PMC)
Power should fall and
stabilizes within 100 ms.
When Powering off
3.3-V rails should be
turned off first, followed by
the 1.5-V rails.
TMP92CF26A
2009-06-25