TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 712

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
Symbol
MAMR0
MAMR1
MAMR2
MAMR3
MSAR0
MSAR1
MSAR2
MSAR3
(3) Memory controller (3/4)
Memory
address
mask
register 0
Memory
start
address
register 0
Memory
address
mask
register 1
Memory
start
address
register 1
Memory
address
mask
register 2
Memory
start
address
register 2
Memory
address
mask
register 3
Memory
start
address
register 3
Name
Address
014AH
014BH
014EH
014FH
0142H
0143H
0146H
0147H
M0V20
M0S23
M1V21
M1S23
M2V22
M2S23
M3V22
M3S23
7
1
1
1
1
1
1
1
1
M0V19
M0S22
M1V20
M1S22
M2V21
M2S22
M3V21
M3S22
6
1
1
1
1
1
1
1
1
92CF26A-710
M0V18
M0S21
M1V19
M1S21
M2V20
M2S21
M3V20
M3S21
0: Compare enable
0: Compare enable
0: Compare enable
0: Compare enable
5
1
1
1
1
1
1
1
1
Set start address A23 to A16
Set start address A23 to A16
Set start address A23 to A16
Set start address A23 to A16
M0V17
M0S20
M1V18
M1S20
M2V19
M2S20
M3V19
M3S20
4
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1: Compare disable
1: Compare disable
1: Compare disable
1: Compare disable
M0V16
M0S19
M1V17
M1S19
M2V18
M2S19
M3V18
M3S19
3
1
1
1
1
1
1
1
1
M0V15
M0S18
M1V16
M1S18
M2V17
M2S18
M3V17
M3S18
2
1
1
1
1
1
1
1
1
M0V14-9
MV15-9
M0S17
M1S17
M2V16
M2S17
M3V16
M3S17
1
1
1
1
1
1
1
1
1
TMP92CF26A
2009-06-25
M0S16
M1S16
M2V15
M2S16
M3V15
M3S16
M0V8
M1V8
0
1
1
1
1
1
1
1
1

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