TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 427

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Figure 3.16.3 Control Flow in UDC (Bulk transfer type (transmission)/Interrupt transfer type (transmission))
Receive IN token
Receive ACK
Generate DATA PID
Transmit data
• Attach DATA0/DATA1
• Confirm Datasize register
Attach CRC
Wait for ACK
OK
OK
OK
OK
OK
• Confirm STATUS register (Status)
• Confirm DATASET register
from host
Confirm Handshake answer
ConfirmToken packet
• PID
• Address
• Endpoint
• Transfer mode
• Error
Normal finish transaction
• Clear FIFO
• Clear DATASET register
• Renew toggle bit
• Set STATUS to READY
IDLE
Time out
Error
• Set STATUS to TX_ERR
• Put back FIFO addless pointer
Bit stuff error
Set STATUS at STALL
More than MAX
payload
Invalid
92CF26A-425
Stall
FIFO empty
Transmit NAK
Transmit STALL
TMP92CF26A
2009-06-25