TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 528

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.19.3.3 Restriction of Display Memory
Condition & Restrictions
In case of above condition, Need to set SDACR<SPRE>= “1”.
Please refer the chapter of SDRAM controller about SDRAM specification in detail.
and external SDRAM. However in case of using SDRAM for display RAM, there is one
restriction as follows.
This LCD controller is supported for display RAM as internal RAM, external SRAM
a) Use for SDRAM as VRAM of LCD controller
and
b) Use DMAC operation
92CF26A-526
TMP92CF26A
2009-06-25