TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 487
TMP92xy26AXBG
Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY26AXBG.pdf
(768 pages)
Specifications of TMP92xy26AXBG
Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
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the calculated CRC value at the end of the transmit data. Figure 3.17.7 below illustrates
the flow chart of the CRC calculation procedures.
(1) Program the SPICT<CRC16_7_B> bit to select the CRC algorithm from CRC7 and
(2) To reset the SPICR register, write a 0 to the CRCRESET_B bit and then write a 1 to the
(3) Load the SPITD register with the transmit data, and wait until transmission of all data
(4) Read the SPICR register and obtain the result of the CRC calculation.
(5) Transmit the CRC obtained in step (4) in the same way as step (3).
This section describes how to calculate the CRC16 of the transmit data and to append
The CRC calculation on the receive data can be performed in the same procedures.
CRC16. Then, also program the CRCRX_TX_B bit to specify the data on which the
CRC calculation is performed.
same bit.
is completed.
Figure 3.17.7 Flow Chart of the CRC Calculation Procedures
Write CRC in SPITD and send
Read CRC from SPICR
CRCRESET_B = 0→1
92CF26A-485
CRCRX_TX_B = 0
Transmit all data
CRC16_7_B = 1,
Finish
Start
TMP92CF26A
2009-06-25
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