TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 649

no-image

TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
3.27 Debug Mode
be mounted on the target board and a DSU connecting cable. For details about debugging,
please refer to the instruction manual of the emulation pod to be used.
The TMP92CF26A includes a debug support unit (DSU) for enabling on-board debugging.
The DSU has 9 debug pins for interfacing with an external emulator via a DSU connector to
This section provides product-specific explanations related to debug mode.
Note: When connecting the TMP92CF26A and an emulator in debug mode, place the DSU connector on the target
TMP92CF26A
(1) Connection method
(2) How to enter debug mode
EI_COMRESET
EO_MCUDATA
board as near (less than 5cm) to the TMP92CF26A as possible. It is desirable that all the signals are same
length.
EO_MCUREQ
mode from debug mode, be sure to set the
using the
EI_PODDATA
EO_TRGOUT
Recommend connector: SAMTEC
EI_PODREQ
EI_SYNCLK
EI_REFCLK
Debug mode can be entered by setting the
EI_TRGIN
DBGE
RESET
Target Board
pin. In details of debus mode, refer the manual of emulation POD.
Connector
92CF26A-647
DSU
FTSH-110-01-DV-EJ
DSU Connecting
Emulation
DBGE
Pod
Cable
DBGE
pin to High and then reset the system
pin to Low. To return to normal
Controller
TMP92CF26A
2009-06-25
PC

Related parts for TMP92xy26AXBG