TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 498

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
SPICR
(826H)
(827H)
16 bits
16 bits
Bit Symbol
Read/Write
Reset State
Function
Bit Symbol
Read/Write
Reset State
Function
Note: The CRC is generated upon data input and output of the TMP92CF26A as illustrated below. The timing of the
(4) SPI CRC Register (SPICR)
(a) CRCD15:0
The SPICR register contains the CRC calculation result for transmit/receive data.
CRC comparison should be fully considered when performing Sequential-mode transmit and receive
operation using the FIFOs.
CRCRX_TX_B and CRCRESET_B bits in the SPICT register are loaded into this
register. When using the CRC16 algorithm, all the bits participate in the CRC
generation. When using the CRC7 algorithm, only the lower seven bits participates in
the CRC generation. The following describes the steps required to calculate the CRC16
for the transmit data.
after programming three bits as follows: CRC16_7_b = 1, CRCRX_TX_B = 0, and
CRCRESET_B = 0.
transmission of all bits, for which the CRC should be calculated.
completed.
the transmit data can be obtained.
The CRC result which is calculated according to the settings of the CRC16_7_b,
First, initialize the CRC calculation register by writing a 1 to the CRCRESET_B bit
Then, by writing the transmit data into the SPITD register, complete the
The SPIST<TEND> bit should be checked to confirm whether the reception is
By reading the SPICR register after the transmission is completed, the CRC16 for
CRCD15
CRCD7
15
7
0
0
TMP92CF26A
CRCD14
CRCD6
14
6
0
0
Figure 3.17.11 SPICR Register
CRCD13
CRCD5
13
5
0
0
SPICR Register
92CF26A-496
CRCD12
CRC result bits [15:8]
CRCD4
CRC result bits [7:0]
12
4
0
0
R
R
CRCD11
CRCD3
SPDO
SPDI
11
CRC generation timing
3
0
0
100 K Ω
100 K Ω
CRCD10
CRCD2
10
2
0
0
DO
DI
CRCD1
CRCD9
SPI Slave
1
9
0
0
TMP92CF26A
CRCD0
CRCD8
2009-06-25
0
8
0
0

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