TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 580
TMP92xy26AXBG
Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY26AXBG.pdf
(768 pages)
Specifications of TMP92xy26AXBG
Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
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3.20 Touch Screen Interface (TSI)
3.20.1
PG3/AN3
P96/INT4
PG2/AN2
VREFH
VREFL
using an internal AD converter.
AVSS
(PX)
AVCC
(MX)
P97
(PY)
(MY)
An interface for 4-terminal resistor network touch-screen is built in.
The TSI easily supports two procedures: ouch detection and X/Y position measurement.
Each procedure is performed by setting the TSI control register (TSICR0 and TSICR1) and
Touch-Screen Interface Module Internal/External Connection
X+
Screen
Touch
Y-
Y+
Figure 3.20.2 Internal block diagram of TSI
Figure 3.20.1External connection of TSI
PXD (typ.50kΩ)
External Capacitors
SPY
X-
SMX
92CF26A-578
SPX
SMY
MY
MX
PY
PX
Dec.
TMP92CF26A
PXEN
PYEN
MXEN
MYEN
AN3
AN2
AVCC
AVSS
VREFH
VREFL
INT4
TSI7
Touch screen control
AD converter
TMP92CF26A
2009-06-25
PTST
INT4
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