TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 99

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.6.4
(1) Transferring music data from internal RAM to I2S by DMA transfer
Setting Example
(a) Main routine
(b) INTDMA0 interrupt routine
This section explains how to set the DMAC using an example.
shall be transferred to FIFO-RAM via I2S. Each time an INTI2S request is asserted, 64
bytes (4 bytes x 16 times) shall be transferred to FIFO-RAM using DMAC channel 0.
Since INTI2S is an FIFO empty interrupt, the first data must be set in advance.
Therefore, only the first 64 bytes shall be transferred by DMA soft start. After 32
Kbytes have been transferred, the INTDMA0 interrupt routine shall be activated to
prepare for the next processing.
1
2
3
4
5
6
7
8
9
10
11
12
13
1
2
3
4
5
6
7
8
9
10
11
No
No
The 32 Kbytes of data stored in the internal RAM at addresses 2000H to 9FFFH
ldl
ldl
ldw
ldw
ldb
set
ld
nop
ld
ld
ldw
ldw
ei
res
reti
:
:
:
:
(hdmaca0),16
(hdmacb0),512
(i2sctl0),xxxxH
(i2sctl1),xxxxH
(hdmas0),2000H
(hdmad0),i2sbuf
(hdmam0),0AH
0,(hdmae)
(dmar),01H
(dma0v),i2s_vector
(intedma01),xxH
xx
0,(hdmae)
Instruction
Instruction
92CF26A-97
; Counter A = 16
; Counter B = 512 (32768/64)
; Transfer mode = source INC, 4 bytes
; Transfer the first 64 bytes by DMA soft start.
;
; INTI2S = DMA0
; Set operation mode for I2S.
; Enable CPU interrupts.
;
; Source address = 2000H
; Destination address = i2sbuf
; Enable DMA channel 0.
; INTDMA level = x
; Start I2S transmission.
; Disable DMA channel 0.
Comments
Comments
TMP92CF26A
2009-06-25