TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 429

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
Receive OUT token
Normal finish transaction
• Set transfer data number to DATASIZE
• Set DATASET register
• Renew toggle bit
• Set STATUS to DATAIN
register
Receive data
• Error
• Confirm receiving data
number
OK
Generate DATA PID
• DATA0/DATA1
• Time out
• Toggle check
Confirm Status
Transmit ACK
Confirm Token packet
OK
• Confirm STATUS register (status)
• Confirm FIFO’s condition
OK
OK
• PID
• Address
• Endpoint
• Transfer mode
• Error
OK
IDLE
Figure 3.16.4 Control Flow in UDC (Bulk transfer type (Receiving))
toggle error
Data communication of
more than payload
Retry transaction
NG
Toggle error
• Set STATU Sat RX_ERR
• Put back FIFO address
• Retry recognition clean
pointer
data
NG
Invalid
92CF26A-427
Generate DATA PID
• DATA0/DATA1
• Time out
• Toggle check
Stall
FIFO FULL,FIFO_DISABLE
toggle error
data error
Transmit NAK
Cancel data
Check error
OK
OK
NG
Transmit STALL
Generate DATA PID
• DATA0/DATA1
• Time out
• Toggle check
Cancel data
Check error
OK
OK
Except data PID,Time out
NG
Error transaction
Error transaction
• Set STATUS at
• Put back FIFO
• Set STATUS to
• Put back FIFO
RX_ERR
address pointer
address pointer
Stall
TMP92CF26A
• Set status at
Error
transaction
RX_ERR
2009-06-25

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