TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 351

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

A read-
modify-write
operation
cannot be
performed
SBICR2
(1243H)
Bit symbol
Read/Write
Reset State
Function
Note 1: Reading this register functions as SBISR register.
Note 2: Switch a mode to port mode after confirming that the bus is free.
Switch a mode between I
Master/Slave
selection
0:Slave
1:Master
MST
7
0
Transmitter
/Receiver
selection
0:Receiver
1:Transmitter
Figure 3.15.5 Registers for the I
TRX
Serial Bus Interface Control Register 2
6
0
Table 3.15.1Resolution of base clock
<GEAR1:0>
Clock Gear
2
C bus mode and port mode after confirming that input signals via port are high-level.
100(fc/16)
W
001(fc/2)
010(fc/4)
011(fc/8)
000(fc)
Start/Stop
condition
Generation
0:Generate
1:Generate
stop
condition
start
condition
BB
5
0
92CF26A-349
Cancel
INTSBI
interrupt
request
0:Don’t care
1:Cancel
interrupt
request
PIN
4
1
f
f
f
f
Base Clock
f
SYS
SYS
SYS
SYS
Resolution
SYS
00
01
10
11
Serial bus interface operating mode selection (Note2)
/2
Serial bus interface
operating mode selection
(Note 2)
00: Port mode
01: Reserved
10: I
11: Reserved
/2
/2
/2
/2
2
3
4
5
6
2
C bus mode
SBIM1
(0.1μs)
(0.4μs)
(0.8μs)
(0.2μs)
(50ns)
2
Port Mode (Serial Bus Interface output disabled)
Reserved
I
Reserved
C Bus mode
2
3
0
@f
C Bus Mode
W (Note 1)
SYS
= 80MHz
SBIM0
2
0
Software reset generate
write “10” and “01”, then
an internal reset signal is
generated.
SWRST1
1
0
W (Note 1)
TMP92CF26A
SWRST0
2009-06-25
0
0