TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 297

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

1/fc
<GEAR2:0>
Clock gear
100(x16)
100(x16)
selection
SYSCR1
000(x1)
001(x2)
010(x4)
011(x8)
000(x1)
001(x2)
010(x4)
011(x8)
8-bit timer × 2 channels
16-bit timer mode
8-bit PPG × 1 channel
8-bit PWM × 1 channel
8-bit timer × 1 channel
Register Name
<Bit Symbol>
Function
Prescaler of
−: Don’t care
clock gear
SYSCR0
<PRCK>
(5) Settings for each mode
0(x2)
1(x8)
Table 3.12.4 shows the SFR settings for each mode.
x
2
<TA01M1:0>
Timer Mode
φT1(x2)
16384/fc
32768/fc
1024/fc
2048/fc
4096/fc
8192/fc
2048/fc
4096/fc
8192/fc
512/fc
00
01
10
11
11
TAxxMOD<TAxCLK1:0>
Table 3.12.4 Timer Mode Setting Registers
131072/fc
φT4(x8)
32768/fc
32768/fc
16384/fc
16384/fc
65536/fc
2
2048/fc
4096/fc
8192/fc
8192/fc
6
(x64)
Table 3.12.3 PWM Cycle
<PWM01:00>
PWM Cycle
(01, 10, 11)
2
6
φT16(x32)
131072/fc
131072/fc
262144/fc
524288/fc
, 2
16384/fc
32768/fc
65536/fc
32768/fc
65536/fc
92CF26A-295
8192/fc
−
−
−
−
7
, 2
8
TA01MOD
φT1(x2)
16384/fc
16384/fc
32768/fc
65536/fc
1024/fc
2048/fc
4096/fc
8192/fc
4096/fc
8192/fc
Upper Timer Input
φT1, φT16, φT256
φT1, φT16, φT256
(00, 01, 10, 11)
<TA1CLK1:0>
TAxxMOD<TAxCLK1:0>
Lower timer
(01, 10, 11)
TAxxMOD<PWMx1:0>
match
Clock
−
−
−
131072/fc
2
262144/fc
PWM cycle
φT4(x8)
16384/fc
32768/fc
65536/fc
16384/fc
32768/fc
65536/fc
4096/fc
8192/fc
7
(x128)
(00, 01, 10, 11)
(00, 01, 10, 11)
(00, 01, 10, 11)
(00, 01, 10, 11)
φT1, φT4, φT16
φT1, φT4, φT16
φT1, φT4, φT16
φT1, φT4, φT16
φT16(x32)
<TA0CLK1:0>
External clock
External clock
External clock
External clock
1048576/fc
131072/fc
262144/fc
131072/fc
262144/fc
524288/fc
Lower Timer
16384/fc
32768/fc
65536/fc
65536/fc
Input Clock
−
131072/fc
φT1(x2)
16384/fc
32768/fc
16384/fc
32768/fc
65536/fc
2048/fc
4096/fc
8192/fc
8192/fc
Timer F/F Invert Signal
TAxxMOD<TAxCLK1:0>
0: Lower timer output
1: Upper timer output
Output disabled
TMP92CF26A
TA1FFCR
TA1FFIS
131072/fc
131072/fc
262144/fc
524288/fc
2
φT4(x8)
16384/fc
32768/fc
65536/fc
32768/fc
65536/fc
Select
8192/fc
8
2009-06-25
(x256)
−
−
−
φT16(x32)
2097152/fc
1048576/fc
131072/fc
262144/fc
524288/fc
131072/fc
262144/fc
524288/fc
32768/fc
65536/fc