TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 642

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
3.25.5
Example 1: Mode transition to the PCM
Condition: Wake-up trigger = INT4 (TSI)
; After Wake-up
Programming Example
org
ld
ldw
ldw
ldw
ldw
ld
ld
ld
ld
ld
ld
ld
ld
di
ld
nop×20
org
ld
002000h
(syscr0),40h
(wdmod),0b100h
(admod0),0000h
(admod2),0000h
(admod4),0000h
(lcdctl0),00h
(pmfc),80h
(p9fc),40h
(inte34),50h
(tsicr1),00h
(pllcr0), 00h
(pllcr1), 00h
(pmcctl),00h
(pmcctl),80h
046000h
(pmcctl),00h
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
92CF26A-640
Program the warm-up time
Enable the low-frequency clock
Disable the WDT
Disable the AD converter
Disable DMA operation
Program the PM7 port as PWE
Enable INT4 and program the interrupt
level
Disable the debounce circuit
Change the CPU clock from PLL to f
Stop the PLL circuit
Enable the PCM_ON bit
(Enters the Power Cut mode)
* Before you program the PMCCTL register
at this point, the PMCCTL register must
remain in the reset state: 00h.
Wait until PCM is entered
Disable the PCM_ON bit
* At the same time, the warm-up time must
be set to default. (The PMCCTL register
must be written as 00h.)
OSCH
TMP92CF26A
2009-06-25

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