TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 174

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.7.23
input or output. Resetting sets ports X5 and X7 to input port and output latch to “0”.
the USB clock input pin (X1USB).
system clock output pin (CLKOUT) and as an output pin (LDIV).
Port X (PX4, PX5 and PX7)
CLKOUT output
Ports X5 and X7 are 2-bit general-purpose I/O ports. Each bit can be set individually for
In addition to functioning as general-purpose I/O port, PX5 and PX7 can also function as
Setting in the corresponding bits of PXCR and PXFC enables the respective functions.
Port X4 is 1-bit general-purpose output port. Resetting sets output latch to “0”.
In addition to functioning as general-purpose output port, PX4 can also function as a
Setting in the corresponding bits of PX and PXFC enables the respective functions.
LDIV output
PX read
(on bit basis)
Output latch
Function
Reset
control
PXFC write
PX write
R
A
B
Selector
S
Figure 3.7.63 Port X4
92CF26A-172
A
Selector
B
S
PX4 (CLKOUT)
(LDIV)
TMP92CF26A
2009-06-25