TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 281

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

TA23MOD
(110CH)
Bit symbol
Read/Write
Reset State
Function
PWM cycle selection
TMRA23 operation mode selection
TMRA2 input clock
TMRA3 input clock
Operation mode
00: 8-bit timer mode
01: 16-bit timer mode
10: 8-bit PPG mode
11: 8-bit PWM mode
TA23M1
<TA23MA1:0>
<TA2CLK1:0>
<TA3CLK1:0>
<PWM21:20>
7
0
TA23M0
6
0
Figure 3.12.9 Register for TMRA
PWM cycle
00: Reserved
01: 2
10: 2
11: 2
TMRA23 Mode Register
PWM21
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
5
0
6
7
8
92CF26A-279
Comparator output from
TMRA2
φT1
φT16
φT256
TA2IN (External input)
φT1
φT4
φT16
TA23MOD<TA23M1:0>≠01 TA23MOD<TA23M1:0>=01
Reserved
2
2
2
8 timer × 2ch
16-bit timer
8-bit PPG
8-bit PWM (TMRA2),
8-bit timer (TMRA3)
6
7
8
× Source clock
× Source clock
× Source clock
PWM20
4
0
R/W
TMRA3 clock for TMRA3
00: TA2TRG
01: φT1
10: φT16
11: φT256
TA3CLK1
3
0
TA3CLK0
Overflow output from
(16-bit timer mode)
2
0
TMRA2
TMRA2 clock for TMRA2
00: TA2IN pin
01: φT1
10: φT4
11: φT16
TA2CLK1
1
0
TA2CLK0
TMP92CF26A
0
0
2009-06-25