TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 22

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
The clock frequency input from the X1 and X2 pins is called f
called fs. The clock frequency selected by SYSCR1<GEAR2:0> is called the system clock f
to as one state.
(Operate only oscillator)
(Operate only oscillator)
(Operate only oscillator)
IDLE2 mode
(I/O operate)
IDLE1 mode
(I/O operate)
(I/O operate)
IDLE2 mode
IDLE1 mode
IDLE2 mode
IDLE1 mode
The clock operating modes are as follows: (a) PLL-OFF Mode (X1, X2 pins only),
Figure 3.3.1 shows a transition figure.
(b) PLL-ON Mode (X1, X2, and PLL).
Note 1: When shifting from PLL-ON mode to PLL-OFF mode, execute the following setting in the same order.
Note 2: It is not possible to shift from PLL-ON mode to STOP mode directly.
PLL-OFF mode should be set once before shifting to STOP mode.
(1) Change CPU clock (Set “0” to PLLCR0<FCSEL>)
(2) Stop PLL circuit (Set “0” to PLLCR1<PLLON>)
instruction
interrupt
instruction
interrupt
instruction
interrupt
instruction
interrupt
instruction
interrupt
instruction
interrupt
Figure 3.3.1 System clock block diagram
(a)
(b)
PLL-OFF mode transition figure
PLL-OFF , PLL-ON mode transition figure
((12 or 16)×f
(f
(f
OSCH
PLL-OFF
OSCH
PLL-ON mode
PLL-OFF mode
92CF26A-20
(f
(f
OSCH
OSCH
OSCH
Reset
Reset
OSCH
/gear value)
/gear value)
Instruction (Note)
release Reset
release Reset
/16)
/16)
mode
and the clock frequency input from the XT1 and XT2 pins is
/gear value)
instruction
interrupt
instruction
interrupt
SYS
. And one cycle of f
(Stops all circuits)
(Stops all circuits)
STOP mode
STOP mode
SYS
TMP92CF26A
is defined
2009-06-25

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