TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 24
TMP92xy26AXBG
Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY26AXBG.pdf
(768 pages)
Specifications of TMP92xy26AXBG
Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
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(a) USB in use, with PLL
(b) USB not in use, with PLL
(c) USB not in use, without PLL
(PLL0 ON/PLL1 ON)
(PLL0 ON/PLL1 OFF)
(PLL0 OFF/PLL1 OFF)
Note: When using USB, the high-frequency oscillator should be 10.0 MHz.
Each PLL can be controlled independently. Frequency of external oscillator is 6 to 10MHz.
oscillator, range of input frequency is 6 to 10MHz. Don’t input the clock over 10MHz.
TMP92CF26A has two PLL circuits: one is for CPU (PLL0) and the other for USB (PLL1).
Don’t connect oscillator more than 10MHz. When clock is input by using external
Table 3.3.1 Setting example for f
High frequency:
Max 10.0 MHz
Max 10.0 MHz
92CF26A-22
10.0 MHz
f
OSCH
Max 80 MHz
Max 80 MHz
Max 10 MHz
System
clock:
f
SYS
OSCH
Max 60 MHz
Max 60 MHz
Max 10 MHz
System
clock:
f
SYS
48 MHz
clock:
TMP92CF26A
USB
f
USB
−
−
2009-06-25
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