TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 750

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

TA45MOD
TA67MOD
TA45RUN
TA5FFCR
TA67RUN
TA7FFCR
Symbol
TA4REG
TA5REG
TA6REG
TA7REG
(14) 8-bit timer (2/2)
TMRA45
RUN
register
8-bit timer
register 4
8-bit timer
register 5
TMRA45
MODE
register
TMRA5
Flip-Flop
control
register
TMRA67
RUN
register
8-bit timer
register 2
8-bit timer
register 3
TMRA67
MODE
register
TMRA7
Flip-Flop
control
register
Name
Address
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
111AH
111BH
111CH
111DH
1110H
1112H
1113H
1114H
1115H
1118H
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
Double
buffer
0: Disable
1: Enable
Operation mode
00: 8-bit timer mode
01: 16-bit timer mode
10: 8-bit PPG mode
11: 8-bit PWM mode
Double
buffer
0: Disable
1: Enable
Operation mode
00: 8-bit timer mode
01: 16-bit timer mode
10: 8-bit PPG mode
11: 8-bit PWM mode
TA6RDE
TA45M1
TA67M1
TA4RDE
R/W
R/W
0
0
0
7
0
TA45M0
TA67M0
0
0
6
92CF26A-748
PWM cycle
00: Reserved
01: 2
10: 2
11: 2
PWM cycle
00: Reserved
01: 2
10: 2
11: 2
PWM41
PWM61
5
0
6
7
8
0
6
7
8
PWM40
PWM60
4
0
0
R/W
R/W
W
W
W
W
−
0
−
0
−
0
−
0
IDLE2
0: Stop
1: Operate 0: Stop and clear
Source clock for TMRA5
00: TA4TRG
01: φ T1
10: φ T16
11: φ T256
00: Invert TA5FF
01: Set TA5FF
10: Clear TA5FF
11: Don’t care
IDLE2
0: Stop
1: Operate 0: Stop and clear
Source clock for TMRA7
00: TA6TRG
01: φ T1
10: φ T16
11: φ T256
00: Invert TA7FF
01: Set TA7FF
10: Clear TA7FF
11: Don’t care
TA5CLK1 TA5CLK0 TA4CLK1 TA4CLK0
TA5FFC1 TA5FFC0
TA7CLK1 TA7CLK0 TA6CLK1 TA6CLK0
TA7FFC1 TA7FFC0
I2TA45
I2TA67
3
0
0
1
0
0
1
W
W
TA45PRUN TA5RUN
TA67PRUN TA7RUN
TMRA45
prescaler
1: Run (Count up)
TMRA67
prescaler
1: Run (Count up)
2
0
0
1
0
0
1
R/W
R/W
Up counter
(UC5)
Source clock for TMRA4
00: 32kHz clock
01: φ T1
10: φ T4
11: φ T16
TA5FF
control for
inversion
0: Disable
1: Enable
Up counter
(UC7)
Source clock for TMRA6
00: 32kHz clock
01: φ T1
10: φ T4
11: φ T16
TA7FF
control for
inversion
0: Disable
1: Enable
TA5FFIE
TA7FFIE
TMP92CF26A
1
0
0
0
0
0
0
2009-06-25
R/W
R/W
Up counter
(UC4)
TA5FF
inversion
select
0: TMRA4
1: TMRA5
Up counter
(UC6)
TA7FF
inversion
select
0: TMRA6
1: TMRA7
TA4RUN
TA5FFIS
TA6RUN
TA7FFIS
0
0
0
0
0
0
0