TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 536

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Reference LHSYNC
(Delay=0)
Note 1: The horizontal back porch must be set so that “data transfer” plus “LCP0 × 2 clocks” are completed within one
Note 2: The vertical back porch must have a minimum of one dummy clock.
• Insertion of dummy clocks
(*) TFT driver
(*) STN driver
period of the reference clock LHSYNC (with 0 delay), as defined by the following equation:
Delay time (LLOAD) + number of data transfer times + 2 < LHSYNC (LCP0 pulse count)
module). Refer to the specifications of the TFT driver (LCD module) to be used.
the horizontal back porch. If the desired refresh rate cannot be obtained by the
horizontal back porch, it can be further adjusted by the vertical back porch. For details,
refer to the setting example to be described later in this section.
(with delay)
horizontal synchronization signal (LHSYNC), and vertical synchronization signal
(LVSYNC) on the LCD panel.
in setting LCDHSP<LH15:0> and LCDVSP<LV9:0> explained earlier.
LVSYNC
LHSYNC
LD23-0
The recommended number of dummy clocks is specified by each TFT driver (or LCD
For an STN driver, the refresh rate can be set accurately by adjusting the value of
LCP0
The above is a conceptual diagram showing the data (LD23-0), shift clock (LCP0),
The front porch and back porch as shown above should be taken into consideration
Horizontal Front
Porch
92CF26A-534
Vertical Front Porch
Vertical back Porch
Note: At least two LCP0 pulses
must be inserted.
Horizontal back
TMP92CF26A
Porch
2009-06-25