MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 100
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Low-, medium- and high-density reset and clock control (RCC)
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Bits 14:10
Bits 9:8 RTCSEL[1:0]: RTC clock source selection
Bits 7:3
Bit 16 BDRST: Backup domain software reset
Bit 15 RTCEN: RTC clock enable
Bit 2 LSEBYP: External low-speed oscillator bypass
Bit 1 LSERDY: External low-speed oscillator ready
Bit 0 LSEON: External low-speed oscillator enable
Set and cleared by software.
0: Reset not activated
1: Resets the entire Backup domain
Set and cleared by software.
0: RTC clock disabled
1: RTC clock enabled
Reserved, always read as 0.
Set by software to select the clock source for the RTC. Once the RTC clock source has been
selected, it cannot be changed anymore unless the Backup domain is reset. The BDRST bit
can be used to reset them.
00: No clock
01: LSE oscillator clock used as RTC clock
10: LSI oscillator clock used as RTC clock
11: HSE oscillator clock divided by 128 used as RTC clock
Reserved, always read as 0.
Set and cleared by software to bypass oscillator in debug mode. This bit can be written only
when the external 32 kHz oscillator is disabled.
0: LSE oscillator not bypassed
1: LSE oscillator bypassed
Set and cleared by hardware to indicate when the external 32 kHz oscillator is stable. After
the LSEON bit is cleared, LSERDY goes low after 6 external low-speed oscillator clock
cycles.
0: External 32 kHz oscillator not ready
1: External 32 kHz oscillator ready
Set and cleared by software.
0: External 32 kHz oscillator OFF
1: External 32 kHz oscillator ON
Doc ID 13902 Rev 9
RM0008
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