MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 240

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Digital-to-analog converter (DAC)
Note:
12.4
12.4.1
240/995
1
2
Figure 50. DAC conversion (SW trigger enabled) with triangle wave generation
DAC trigger must be enabled for noise generation, by setting the TENx bit in the DAC_CR
register.
MAMPx[3:0] bits must be configured before enabling the DAC, otherwise they cannot be
changed.
Dual DAC channel conversion
To efficiently use the bus bandwidth in applications that require the two DAC channels at the
same time, three dual registers are implemented: DHR8RD, DHR12RD and DHR12LD. A
unique register access is then required to drive both DAC channels at the same time.
Eleven possible conversion modes are possible using the two DAC channels and these dual
registers. All the conversion modes can nevertheless be obtained using separate DHRx
registers if needed.
All modes are described in the paragraphs below.
Independent trigger without wave generation
To configure the DAC in this conversion mode, the following sequence is required:
●
●
●
When a DAC channel1 trigger arrives, the DHR1 register is transferred into DAC_DOR1
(three APB1 clock cycles later).
When a DAC channel2 trigger arrives, the DHR2 register is transferred into DAC_DOR2
(three APB1 clock cycles later).
APB1_CLK
SWTRIG
Set the two DAC channel trigger enable bits TEN1 and TEN2
Configure different trigger sources by setting different values in the TSEL1[2:0] and
TSEL2[2:0] bits
Load the dual DAC channel data into the desired DHR register (DAC_DHR12RD,
DAC_DHR12LD or DAC_DHR8RD)
DOR
DHR
0xABE
Doc ID 13902 Rev 9
0xABE
0xABF
0xAC0
RM0008
ai14714