MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 958
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Debug support (DBG)
Note:
29.6
29.6.1
958/995
Important: Once Serial-Wire is selected using the dedicated ARM JTAG sequence, the
boundary scan TAP is automatically disabled (JTMS forced high).
Figure 322. JTAG TAP connections
ID codes and locking mechanism
There are several ID codes inside the STM32F10xxx MCU. ST strongly recommends tools
designers to lock their debuggers using the MCU DEVICE ID code located in the external
PPB memory map at address 0xE0042000.
MCU device ID code
The STM32F10xxx MCU integrates an MCU ID code. This ID identifies the ST MCU part-
number and the die revision. It is part of the DBG_MCU component and is mapped on the
external PPB bus (see
debug port (4 to 5 pins) or the SW debug port (two pins) or by the user software. It is even
accessible while the MCU is under system reset.
JNTRST
JTMS
JTDI
JTDO
Section 29.16 on page
STM32F10xxx
SW-DP
Selected
Doc ID 13902 Rev 9
TDI
Boundary scan
IR is 5-bit wide
TMS nTRST
TAP
TDO
971). This code is accessible using the JTAG
TDI
Cortex-M3 TAP
IR is 4-bit wide
TMS nTRST
TDO
ai14981
RM0008
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