MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 128

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Connectivity line devices: reset and clock control (RCC)
7.3.8
128/995
SPI3
EN
31
15
rw
Reserved
SPI2
EN
30
14
rw
Bits 31:30
Bits 24:23
APB1 peripheral clock enable register (RCC_APB1ENR)
Address: 0x1C
Reset value: 0x0000 0000
Access: word, half-word and byte access
No wait state, except if the access occurs while an access to a peripheral on APB1 domain
is on going. In this case, wait states are inserted until this access to APB1 peripheral is
finished.
Bit 29 DACEN: DAC interface clock enable
Bit 28 PWREN: Power interface clock enable
Bit 27 BKPEN: Backup interface clock enable
Bit 26 CAN2EN: CAN2 clock enable
Bit 25 CAN1EN: CAN1 clock enable
Bit 22 I2C2EN: I2C 2 clock enable
DAC
EN
29
13
rw
Reserved
PWR
EN
28
rw
12
Reserved, always read as 0.
Set and cleared by software.
0: DAC interface clock disabled
1: DAC interface clock enable
Set and cleared by software.
0: Power interface clock disabled
1: Power interface clock enable
Set and cleared by software.
0: Backup interface clock disabled
1: Backup interface clock enabled
Set and cleared by software.
0: CAN2 clock disabled
1: CAN2 clock enabled
Set and cleared by software.
0: CAN1 clock disabled
1: CAN1 clock enabled
Reserved, always read as 0.
Set and cleared by software.
0: I2C 2 clock disabled
1: I2C 2 clock enabled
WWD
GEN
BKP
EN
27
rw
11
rw
CAN2
EN
26
rw
10
CAN1
EN
25
rw
9
Reserved
Doc ID 13902 Rev 9
24
8
Reserved
23
7
I2C2
EN
22
rw
6
TIM7
I2C1
EN
EN
21
rw
rw
5
UART5E
TIM6
EN
20
rw
rw
N
4
UART4
TIM5
EN
EN
19
rw
rw
3
USART
TIM4
3EN
EN
18
rw
rw
2
USART
TIM3
2EN
EN
17
rw
rw
1
RM0008
TIM2
Res.
EN
16
rw
0