MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 444

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Flexible static memory controller (FSMC)
19.6.2
19.6.3
444/995
NAND Flash / PC Card supported memories and transactions
Table 117
Transactions not allowed (or not supported) by the NAND Flash / PC Card controller appear
in gray.
Table 117. Supported memories and transactions
Timing diagrams for NAND, ATA and PC Card
Each PC Card/CompactFlash and NAND Flash memory bank is managed through a set of
registers:
●
●
●
●
●
●
Each timing configuration register contains three parameters used to define number of
HCLK cycles for the three phases of any PC Card/CompactFlash or NAND Flash access,
plus one parameter that defines the timing for starting driving the databus in the case of a
write.
knowing that Attribute and I/O (only for PC Card) memory space access timings are similar.
NAND 16-bit
NAND 8-bit
Device
Control register: FSMC_PCRx
Interrupt status register: FSMC_SRx
ECC register: FSMC_ECCRx
Timing register for Common memory space: FSMC_PMEMx
Timing register for Attribute memory space: FSMC_PATTx
Timing register for I/O space: FSMC_PIOx
Figure 175
below shows the supported devices, access modes and transactions.
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Mode
shows the timing parameter definitions for common memory accesses,
R/W
W
W
W
W
W
W
R
R
R
R
R
R
Doc ID 13902 Rev 9
data size
AHB
16
16
32
32
16
16
32
32
8
8
8
8
data size
Memory
16
16
16
16
16
16
8
8
8
8
8
8
not allowed
Allowed/
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Split into 2 FSMC accesses
Split into 2 FSMC accesses
Split into 4 FSMC accesses
Split into 4 FSMC accesses
Split into 2 FSMC accesses
Split into 2 FSMC accesses
Comments
RM0008