MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 793

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
26.15.2
26.15.3
Host initialization
To initialize the core as host, the application must perform the following steps:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Program the HFIR register with a value corresponding to the selected PHY clock 1
11. Program the OTG_FS_RXFSIZE register to select the size of the receive FIFO.
12. Program the OTG_FS_NPTXFSIZE register to select the size and the start address of
13. Program the OTG_FS_HPTXFSIZ register to select the size and start address of the
To communicate with devices, the system software must initialize and enable at least one
channel.
Device initialization
The application must perform the following steps to initialize the core as a device on power-
up or after a mode change from Host to Device.
1.
2.
3.
4.
Wait for the ENUMDNE interrupt in OTG_FS_GINTSTS. This interrupt indicates the end of
reset on the USB. On receiving this interrupt, the application must read the OTG_FS_DSTS
register to determine the enumeration speed and perform the steps listed in
initialization on enumeration completion on page
At this point, the device is ready to accept SOF packets and perform control transfers on
control endpoint 0.
Program the HPRTINT in GINTMSK to unmask
Program the OTG_FS_HCFG register to select full-speed host
Program the PPWR bit in OTG_FS_HPRT to 1. This drives V
Wait for the PCDET interrupt in OTG_FS_HPRT0. This indicates that a device is
connecting to the port.
Program the PRST bit in OTG_FS_HPRT to 1. This starts the reset process.
Wait at least 10 ms for the reset process to complete.
Program the PRST bit in OTG_FS_HPRT to 0.
Wait for the PENCHNG interrupt in OTG_FS_HPRT.
Read the PSPD bit in OTG_FS_HPRT to get the enumerated speed.
the Non-periodic transmit FIFO for non-periodic transactions.
periodic transmit FIFO for periodic transactions.
Program the following fields in the OTG_FS_DCFG register:
–
–
Program the OTG_FS_GINTMSK register to unmask the following interrupts:
–
–
–
–
–
Program the VBUSBSEN bit in the OTG_FS_GCCFG register to enable V
in “B” device mode and supply the 5 volts across the pull-up resistor on the DP line.
Wait for the USBRST interrupt in OTG_FS_GINTSTS. It indicates that a reset has been
detected on the USB that lasts for about 10 ms on receiving this interrupt.
Device speed
Non-zero-length status OUT handshake
USB reset
Enumeration done
Early suspend
USB suspend
SOF
Doc ID 13902 Rev 9
812.
USB on-the-go full-speed (OTG_FS)
BUS
on the USB.
Endpoint
BUS
sensing
793/995