MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 796

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
USB on-the-go full-speed (OTG_FS)
796/995
Figure 271. Receive FIFO read task
Bulk and control OUT/SETUP transactions
A typical bulk or control OUT/SETUP pipelined transaction-level operation is shown in
Figure
SETUP transaction operates in the same way but has only one packet. The
assumptions are:
Normal bulk and control OUT/SETUP operations
The sequence of operations in
a)
b)
c)
d)
e)
f)
g)
h)
The application is attempting to send two maximum-packet-size packets (transfer
size = 1, 024 bytes).
The non-periodic transmit FIFO can hold two packets (128 KB for FS).
The non-periodic request queue depth = 4.
Initialize channel 1
Write the first packet for channel 1
Along with the last DWORD write, the core writes an entry to the non-periodic
request queue
As soon as the non-periodic queue becomes non-empty, the core attempts to
send an OUT token in the current frame
Write the second (last) packet for channel 1
The core generates the XFRC interrupt as soon as the last transaction is
completed successfully
In response to the XFRC interrupt, de-allocate the channel for other transfers
Handling non-ACK responses
272. See channel 1 (ch_1). Two bulk OUT packets are transmitted. A control
Read the received
Unmask RXFLVL
packet from the
Receive FIFO
interrupt
Yes
Doc ID 13902 Rev 9
Figure 272
OTG_FS_GRXSTSP
No
Mask RXFLVL
BCNT > 0?
interrupt ?
PKTSTS
0b0010?
interrupt
RXFLVL
Read
Start
Yes
Yes
(channel 1) is as follows:
No
Unmask RXFLVL
interrupt
No
ai15674
RM0008

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