MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 599

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
RM0008
Figure 211. I
The SPI could function as an audio I
setting the I2SMOD bit in the SPI_I2SCFGR register). This interface uses almost the same
pins, flags and interrupts as the SPI.
The I
MOSI/ SD
NSS/WS
MCK
SD: Serial Data (mapped on the MOSI pin) to transmit or receive the two time-
multiplexed data channels (in simplex mode only).
WS: Word Select (mapped on the NSS pin) is the data control signal output in master
mode and input in slave mode.
CK: Serial Clock (mapped on the SCK pin) is the serial clock output in master mode
and serial clock input in slave mode.
MISO
2
CK
S shares three common pins with the SPI:
I2SMOD
2
S block diagram
I2S_CK
Master control logic
baud rate generator
Doc ID 13902 Rev 9
SPI
2
S interface when the I
MCKOE ODD
Shift register
Tx buffer
Rx buffer
I
2
S clock generator
16-bit
16-bit
I2SCFG
[1:0]
Bidi
mode
LSB
First SPE BR2 BR1 BR0
Address and data bus
I2SDIV[7:0]
BSY OVR MODF CRC
Bidi
OE
Serial peripheral interface (SPI)
I2SSTD
[1:0]
2
CRC
EN
S capability is enabled (by
LSB first
CRC
Next
CKPOL
DFF
ERR
DATLEN
[1:0]
MSTR CPOL CPHA
Rx
only
UDR
MOD
I2S
SSM SSI
I2SE
CH
SIDE
I2SxCLK
CH
LEN
Communication
control
TxE RxNE
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