MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 960
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Debug support (DBG)
29.6.2
29.6.3
29.6.4
29.7
960/995
Boundary scan TAP
JTAG ID code
The TAP of the STM32F10xxx BSC (boundary scan) integrates a JTAG ID code equal to:
●
●
●
●
Cortex-M3 TAP
The TAP of the ARM Cortex-M3 integrates a JTAG ID code. This ID code is the ARM default
one and has not been modified. This code is only accessible by the JTAG Debug Port.
This code is 0x3BA00477 (corresponds to Cortex-M3 r1p1-01rel0, see
on page
Only the DEV_ID(11:0) should be used for identification by the debugger/programmer tools.
Cortex-M3 JEDEC-106 ID code
The ARM Cortex-M3 integrates a JEDEC-106 ID code. It is located in the 4KB ROM table
mapped on the internal PPB bus at address 0xE00FF000_0xE00FFFFF.
This code is accessible by the JTAG Debug Port (4 to 5 pins) or by the SW Debug Port (two
pins) or by the user software.
JTAG debug port
A standard JTAG state machine is implemented with a 4-bit instruction register (IR) and five
data registers (for full details, refer to the Cortex-M3 r1p1 Technical Reference Manual
(TRM), for references, please see
Table 200. JTAG debug port data registers
IR(3:0)
1111
1110
In low-density devices:
–
In medium-density devices:
–
–
In high-density devices:
–
In connectivity line devices:
–
1).
0x06412041 = Revision A
0x06410041 = Revision A
0x16410041 = Revision B and Revision Z
0x06414041 = Revision A
0x06418041 = Revision A and Revision Z
Data register
BYPASS
IDCODE
[32 bits]
[1 bit]
ID CODE
0x3BA00477 (ARM Cortex-M3 r1p1-01rel0 ID Code)
Doc ID 13902 Rev 9
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