MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 955

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
29.4
29.4.1
29.4.2
JTAG-DP and enables the SW-DP. This way it is possible to activate the SWDP using only
the SWCLK and SWDIO pins.
This sequence is:
1.
2.
3.
Pinout and debug port pins
The STM32F10xxx MCU is available in various packages with different numbers of available
pins. As a result, some functionality related to pin availability may differ between packages.
SWJ debug port pins
Five pins are used as outputs from the STM32F10xxx for the SWJ-DP as alternate functions
of General Purpose I/Os. These pins are available on all packages.
Table 198. SWJ debug port pins
Flexible SWJ-DP pin assignment
After RESET (SYSRESETn or PORESETn), all five pins used for the SWJ-DP are assigned
as dedicated pins immediately usable by the debugger host (note that the trace outputs are
not assigned except if explicitly programmed by the debugger host).
However, the STM32F10xxx MCU implements the
register (AFIO_MAPR)
releases the associated pins for General Purpose I/Os usage. This register is mapped on an
APB bridge connected to the Cortex-M3 System Bus. Programming of this register is done
by the user software program and not the debugger host.
JTMS/SWDIO
JTCK/SWCLK
JTDI
JTDO/TRACESWO
JNTRST
SWJ-DP pin name
Send more than 50 TCK cycles with TMS (SWDIO) =1
Send the 16-bit sequence on TMS (SWDIO) = 0111100111100111 (MSB transmitted
first)
Send more than 50 TCK cycles with TMS (SWDIO) =1
Type
O
I
I
I
I
register to disable some part or all of the SWJ-DP port and so
JTAG debug port
JTAG Test Mode
Selection
JTAG Test Clock
JTAG Test Data Input
JTAG Test Data Output
JTAG Test nReset
Doc ID 13902 Rev 9
Description
Type
I/O
AF remap and debug I/O configuration
-
-
-
I
Serial Wire Data
Input/Output
Serial Wire Clock
-
TRACESWO if async trace
is enabled
-
SW debug port
Debug assignment
Debug support (DBG)
PA13
PA14
PA15
PB3
PB4
assign
955/995
ment
Pin