MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 965

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
29.8.6
29.9
Table 205. SW-DP registers (continued)
SW-AP registers
Access to these registers are initiated when APnDP=1
There are many AP Registers (see AHB-AP) addressed as the combination of:
●
●
AHB-AP (AHB access port) - valid for both JTAG-DP or SW-
DP
Features:
●
●
●
●
●
01
01
10
10
11
A(3:2)
The shifted value A[3:2]
The current value of the DP SELECT register
System access is independent of the processor status.
Either SW-DP or JTAG-DP accesses AHB-AP.
The AHB-AP is an AHB master into the Bus Matrix. Consequently, it can access all the
data buses (Dcode Bus, System Bus, internal and external PPB bus) but the ICode
bus.
Bitband transactions are supported.
AHB-AP transactions bypass the FPB.
Read/Write
Read/Write
Read
Write
Read/Write
R/W
CTRLSEL bit
of SELECT
register
0
1
Doc ID 13902 Rev 9
DP-CTRL/STAT
WIRE
CONTROL
READ
RESEND
SELECT
READ
BUFFER
Register
Purpose is to:
– request a system or debug power-up
– configure the transfer operation for AP
– control the pushed compare and pushed
– read some status flags (overrun, power-up
Purpose is to configure the physical serial
port protocol (like the duration of the
turnaround time)
Enables recovery of the read data from a
corrupted debugger transfer, without
repeating the original AP transfer.
The purpose is to select the current access
port and the active 4-words register window
This read buffer is useful because AP
accesses are posted (the result of a read AP
request is available on the next AP
transaction).
This read buffer captures data from the AP,
presented as the result of a previous read,
without initiating a new transaction
accesses
verify operations.
acknowledges)
Notes
Debug support (DBG)
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