MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 221

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
Bit 12 JDISCEN: Discontinuous mode on injected channels
Bit 11 DISCEN: Discontinuous mode on regular channels
Bit 10 JAUTO: Automatic Injected Group conversion
Bit 9 AWDSGL: Enable the watchdog on a single channel in scan mode
Bit 8 SCAN: Scan mode
Bit 7 JEOCIE: Interrupt enable for injected channels
Bit 6 AWDIE: Analog watchdog interrupt enable
Bit 5 EOCIE: Interrupt enable for EOC
Note: An EOC or JEOC interrupt is generated only on the end of conversion of the last
This bit set and cleared by software to enable/disable discontinuous mode on injected group
channels
0: Discontinuous mode on injected channels disabled
1: Discontinuous mode on injected channels enabled
This bit set and cleared by software to enable/disable Discontinuous mode on regular
channels.
0: Discontinuous mode on regular channels disabled
1: Discontinuous mode on regular channels enabled
This bit set and cleared by software to enable/disable automatic injected group conversion
after regular group conversion.
0: Automatic injected group conversion disabled
1: Automatic injected group conversion enabled
This bit set and cleared by software to enable/disable the analog watchdog on the channel
identified by the AWDCH[4:0] bits.
0: Analog watchdog enabled on all channels
1: Analog watchdog enabled on a single channel
This bit is set and cleared by software to enable/disable Scan mode. In Scan mode, the
inputs selected through the ADC_SQRx or ADC_JSQRx registers are converted.
0: Scan mode disabled
1: Scan mode enabled
This bit is set and cleared by software to enable/disable the end of conversion interrupt for
injected channels.
0: JEOC interrupt disabled
1: JEOC interrupt enabled. An interrupt is generated when the JEOC bit is set.
This bit is set and cleared by software to enable/disable the analog watchdog interrupt. In
Scan mode if the watchdog thresholds are crossed, scan is aborted only if this bit is enabled.
0: Analog watchdog interrupt disabled
1: Analog watchdog interrupt enabled
This bit is set and cleared by software to enable/disable the End of Conversion interrupt.
0: EOC interrupt disabled
1: EOC interrupt enabled. An interrupt is generated when the EOC bit is set.
channel if the corresponding EOCIE or JEOCIE bit is set
Doc ID 13902 Rev 9
Analog-to-digital converter (ADC)
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