MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 392
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Real-time clock (RTC)
16.4
16.4.1
392/995
15
14
Bits 15:3 Reserved, forced by hardware to 0.
RTC registers
Refer to
RTC control register high (RTC_CRH)
Address offset: 0x00
Reset value: 0x0000
These bits are used to mask interrupt requests. Note that at reset all interrupts are disabled,
so it is possible to write to the RTC registers to ensure that no interrupt requests are pending
after initialization. It is not possible to write to the RTC_CRH register when the peripheral is
completing a previous write operation (flagged by RTOFF=0, see
390).
The RTC functions are controlled by this control register. Some bits must be written using a
specific configuration procedure (see
Bit 2 OWIE: Overflow interrupt enable
Bit 1 ALRIE: Alarm interrupt enable
Bit 0 SECIE: Second interrupt enable
13
Section 1.1 on page 37
0: Overflow interrupt is masked.
1: Overflow interrupt is enabled.
0: Alarm interrupt is masked.
1: Alarm interrupt is enabled.
0: Second interrupt is masked.
1: Second interrupt is enabled.
12
11
10
Reserved
9
Doc ID 13902 Rev 9
for a list of abbreviations used in register descriptions.
8
Configuration
7
6
procedure:).
5
4
Section 16.3.4 on page
3
OWIE
rw
2
ALRIE
rw
1
RM0008
SECIE
rw
0
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