MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 953

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
RM0008
Note:
Note:
Figure 320. Block diagram of STM32F10xxx-level and Cortex-M3-level debug support
The debug features embedded in the Cortex-M3 core are a subset of the ARM CoreSight
Design Kit.
The ARM Cortex-M3 core provides integrated on-chip debug support. It is comprised of:
It also includes debug features dedicated to STM32F10xxx:
For further information on debug functionality supported by the ARM Cortex-M3 core, refer
to the Cortex-M3-r1p1Technical Reference Manual (see
to the CoreSight Design Kit-r1p0TRM.
JTDI
NJTRST
SWCLK
JTMS/
SWDIO
TRACESWO
JTCK/
JTDO/
SWJ-DP: Serial wire / JTAG debug port
AHP-AP: AHB access
ITM: Instrumentation trace macrocell
FPB: Flash patch breakpoint
DWT: Data watchpoint trigger
TPUI: Trace port unit interface (available on larger packages, where the corresponding
pins are mapped)
ETM: Embedded Trace Macrocell (available on larger packages, where the
corresponding pins are mapped)
Flexible debug pinout assignment
MCU debug box (support for low-power modes, control over peripheral clocks, etc.)
STM32F10xxx debug support
Cortex-M3 debug support
SWJ-DP
Cortex-M3
Internal private
peripheral bus (PPB)
AHB-AP
p
Core
ort
Doc ID 13902 Rev 9
Bus matrix
Data
Bridge
NVIC
DWT
FPB
ITM
External private
peripheral bus (PPB)
Related documents on page
System
interface
ETM
TPIU
DCode
interface
Debug support (DBG)
Trace port
DBGMCU
TRACESWO
TRACECK
TRACED[3:0]
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