MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 980

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Debug support (DBG)
29.17.10 Example of configuration
29.18
Table 214. DBG register map and reset values
1. The reset value is product dependent. For more information, refer to
980/995
Addr.
DBGMCU_CR
Reset value
Reset value
Register
DBGMCU_
IDCODE
DBG register map
The following table summarizes the Debug registers.
(1)
Set the bit TRCENA in the Debug Exception and Monitor Control Register (DEMCR)
Write the TPIU Current Port Size Register to the desired value (default is 0x1 for a 1-bit
port size)
Write TPIU Formatter and Flush Control Register to 0x102 (default value)
Write the TPIU Select Pin Protocol to select the sync or async mode. Example: 0x2 for
async NRZ mode (UART like)
Write the DBGMCU control register to 0x20 (bit IO_TRACEN) to assign TRACE I/Os for
async mode. A TPIU Sync packet is emitted at this time (FF_FF_FF_7F)
Configure the ITM and write the ITM Stimulus register to output a value
X X
X X
Reserved
X X
X X
REV_ID
X X
Doc ID 13902 Rev 9
X X
0
0
X X
0
0
X X
0
Section 29.6.1: MCU device ID
0
0
Reserved
0
0
0
X X
0
0
X X
0
0
code.
X X
0
DEV_ID
0
X X
0
X X
RM0008
0
X X
0
0

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