MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 195

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
10.4.5
10.4.6
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
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Bits 31:0 PA[31:0]: Peripheral address
Bits 31:0 MA[31:0]: Memory address
DMA channel x peripheral address register (DMA_CPARx) (x = 1 ..7)
Address offset: 0x10 + dx20 × Channel number
Reset value: 0x0000 0000
This register must not be written when the channel is enabled.
DMA channel x memory address register (DMA_CMARx) (x = 1 ..7)
Address offset: 0x14 + dx20 × Channel number
Reset value: 0x0000 0000
This register must not be written when the channel is enabled.
Base address of the peripheral data register from/to which the data will be read/written.
When PSIZE is 01 (16-bit), the PA[0] bit is ignored. Access is automatically aligned to a half-
word address.
When PSIZE is 10 (32-bit), PA[1:0] are ignored. Access is automatically aligned to a word
address.
Base address of the memory area from/to which the data will be read/written.
When MSIZE is 01 (16-bit), the MA[0] bit is ignored. Access is automatically aligned to a
half-word address.
When MSIZE is 10 (32-bit), MA[1:0] are ignored. Access is automatically aligned to a word
address.
Doc ID 13902 Rev 9
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DMA controller (DMA)
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