MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 543
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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RM0008
Note:
22.3
Management
●
●
Dual CAN (connectivity line only)
●
●
●
In medium-density and high-density devices the USB and CAN share a dedicated 512-byte
SRAM memory for data transmission and reception, and so they cannot be used
concurrently (the shared SRAM is accessed through CAN and USB exclusively). The USB
and CAN can be used in the same application but not at the same time.
bxCAN general description
In today’s CAN applications, the number of nodes in a network is increasing and often
several networks are linked together via gateways. Typically the number of messages in the
system (and thus to be handled by each node) has significantly increased. In addition to the
application messages, Network Management and Diagnostic messages have been
introduced.
●
Furthermore, application tasks require more CPU time, therefore real-time constraints
caused by message reception have to be reduced.
●
The standard HLP (Higher Layer Protocol) based on standard CAN drivers requires an
efficient interface to the CAN controller.
Figure 192. CAN network topology
Maskable interrupts
Software-efficient mailbox mapping at a unique address space
CAN1: Master bxCAN for managing the communication between a Slave bxCAN and
the 512-byte SRAM memory
CAN2: Slave bxCAN, with no direct access to the SRAM memory.
The two bxCAN cells share the 512-byte SRAM memory (see
An enhanced filtering mechanism is required to handle each type of message.
A receive FIFO scheme allows the CPU to be dedicated to application tasks for a long
time period without losing messages.
CAN Bus
CAN
Rx
CAN
High
Application
MCU
CAN
Transceiver
CAN
Controller
CAN
CAN
Tx
Low
Doc ID 13902 Rev 9
Controller area network (bxCAN)
Figure 193 on page
543/995
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