MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 361
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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RM0008
14.4.5
15
Reserved
14
Bit 15:13
Bits 8:7
Bit 12 CC4OF: Capture/Compare 4 overcapture flag
Bit 11 CC3OF: Capture/Compare 3 overcapture flag
Bit 10 CC2OF: Capture/compare 2 overcapture flag
TIMx status register (TIMx_SR)
Address offset: 0x10
Reset value: 0x0000
Bit 9 CC1OF: Capture/Compare 1 overcapture flag
Bit 6 TIF: Trigger interrupt flag
Bit 5
Bit 4 CC4IF: Capture/Compare 4 interrupt flag
Bit 3 CC3IF: Capture/Compare 3 interrupt flag
Bit 2 CC2IE: Capture/Compare 2 interrupt enable
Bit 1 CC1IE: Capture/Compare 1 interrupt enable
Bit 0 UIE: Update interrupt enable
13
CC4OF CC3OF CC2OF CC1OF
rc_w0
Reserved, always read as 0.
refer to CC1OF description
refer to CC1OF description
refer to CC1OF description
This flag is set by hardware only when the corresponding channel is configured in input
capture mode. It is cleared by software by writing it to ‘0’.
0: No overcapture has been detected.
1: The counter value has been captured in TIMx_CCR1 register while CC1IF flag was
already set
Reserved, always read as 0.
This flag is set by hardware on trigger event (active edge detected on TRGI input when the
slave mode controller is enabled in all modes but gated mode, both edges in case gated
mode is selected). It is cleared by software.
0: No trigger event occurred.
1: Trigger interrupt pending.
Reserved, always read as 0
refer to CC1IF description
refer to CC1IF description
0: CC2 interrupt disabled.
1: CC2 interrupt enabled.
0: CC1 interrupt disabled.
1: CC1 interrupt enabled.
0: Update interrupt disabled.
1: Update interrupt enabled.
12
rc_w0
11
rc_w0
10
rc_w0
9
Doc ID 13902 Rev 9
8
Reserved
7
rc_w0
TIF
6
Res
5
CC4IF
General-purpose timer (TIMx)
rc_w0
4
CC3IF
rc_w0
3
CC2IF
rc_w0
2
CC1IF
rc_w0
1
361/995
rc_w0
UIF
0
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