MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 510

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secure digital input/output interface (SDIO)
20.9.15
20.9.16
Table 151. SDIO register map
510/995
Offset
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
0x0C
0x1C
0x2C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
SDIO_RESPCM
SDIO_DCOUNT
SDIO_DTIMER
SDIO_POWER
SDIO_CLKCR
SDIO_RESP1
SDIO_RESP2
SDIO_RESP3
SDIO_RESP4
SDIO_DCTRL
SDIO_DLEN
SDIO_ARG
SDIO_CMD
Register
SDIO_STA
bits 31:0 FIFOData: Receive and transmit FIFO data
D
SDIO data FIFO register (SDIO_FIFO)
Address offset: 0x80
Reset value: 0x0000 0000
The receive and transmit FIFOs can be read or written as 32-bit wide registers. The FIFOs
contain 32 entries on 32 sequential addresses. This allows the CPU to use its load and store
multiple operands to read from/write to the FIFO.
SDIO register map
The following table summarizes the SDIO registers.
The FIFO data occupies 32 entries of 32-bit words, from address:
SDIO base + 0x080 to SDIO base + 0xFC.
Reserved
Reserved
Doc ID 13902 Rev 9
FIF0Data
Reserved
CARDSTATUS1
CARDSTATUS2
CARDSTATUS3
CARDSTATUS4
DATATIME
CMDARG
DATALENGTH
DATACOUNT
9
8
7
6
5
4
RESPCMD
3
RM0008
2
1
0

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