MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 667

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
Note:
25.3.6
The USART receiver’s tolerance to properly receive data is equal to the maximum tolerated
deviation and depends on the following choices:
●
●
The figures specified in
the received frames contain some Idle frames of exactly 10-bit times when M=0 (11-bit times
when M=1).
Multiprocessor communication
There is a possibility of performing multiprocessor communication with the USART (several
USARTs connected in a network). For instance one of the USARTs can be the master, its
TX output is connected to the RX input of the other USART. The others are slaves, their
respective TX outputs are logically ANDed together and connected to the RX input of the
master.
In multiprocessor configurations it is often desirable that only the intended message
recipient should actively receive the full message contents, thus reducing redundant USART
service overhead for all non addressed receivers.
The non addressed devices may be placed in mute mode by means of the muting function.
In mute mode:
●
●
●
The USART can enter or exit from mute mode using one of two methods, depending on the
WAKE bit in the USART_CR1 register:
●
●
Idle line detection (WAKE=0)
The USART enters mute mode when the RWU bit is written to 1.
It wakes up when an Idle frame is detected. Then the RWU bit is cleared by hardware but
the IDLE bit is not set in the USART_SR register. RWU can also be written to 0 by software.
An example of mute mode behavior using idle line detection is given in
Table 175. USART receiver ‘s tolerance when DIV_Fraction is 0
Table 176. USART receiver’s tolerance when DIV_Fraction is different from 0
10- or 11-bit character length defined by the M bit in the USART_CR1 register
use of fractional baud rate or not
None of the reception status bits can be set.
All the receive interrupts are inhibited.
The RWU bit in USART_CR1 register is set to 1. RWU can be controlled automatically
by hardware or written by the software under certain conditions.
Idle Line detection if the WAKE bit is reset,
Address Mark detection if the WAKE bit is set.
M bit
0
1
M bit
0
1
Universal synchronous asynchronous receiver transmitter (USART)
Table 175
Doc ID 13902 Rev 9
NF is an error
and
3.33%
3.03%
NF is an error
Table 176
3.75%
3.41%
may slighly differ in the special case when
NF is don’t care
NF is don’t care
3.88%
3.53%
Figure
4.375%
3.97%
244.
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