MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 614

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial peripheral interface (SPI)
23.4.9
23.5
23.5.1
614/995
MODE
BIDI
15
rw
BIDI
OE
14
rw
DMA features
DMA is working in exactly the same way as for the SPI mode. There is no difference on the
I
protection system.
SPI and I
Refer to
SPI control register 1 (SPI_CR1) (not used in I
Address offset: 0x00
Reset value: 0x0000)
Bit 15 BIDIMODE: Bidirectional data mode enable
Bit 14 BIDIOE: Output enable in bidirectional mode
Bit 13 CRCEN: Hardware CRC calculation enable
Bit 12 CRCNEXT: Transmit CRC next
Bit 11 DFF: Data frame format
2
S. Only the CRC feature is not available in I
CRC
EN
13
rw
Note: Not used in I
Note: In master mode, the MOSI pin is used and in slave mode, the MISO pin is used.
Note: This bit should be written only when SPI is disabled (SPE = ‘0’) for correct operation
Note: This bit has to be written as soon as the last data is written into the SPI_DR register.
Note: This bit should be written only when SPI is disabled (SPE = ‘0’) for correct operation
NEXT
CRC
0: 2-line unidirectional data mode selected
1: 1-line bidirectional data mode selected
This bit combined with the BIDImode bit selects the direction of transfer in bidirectional
mode
0: Output disabled (receive-only mode)
1: Output enabled (transmit-only mode)
0: CRC calculation disabled
1: CRC calculation Enabled
0: Next transmit value is from Tx buffer
1: Next transmit value is from Tx CRC register
0: 8-bit data frame format is selected for transmission/reception
1: 16-bit data frame format is selected for transmission/reception
Section 1.1 on page 37
12
rw
Not used in I
Not used in I
Not used in I
Not used in I
2
S registers
DFF
11
rw
ONLY
RX
10
rw
2
2
2
2
2
S mode
S mode
S mode
S mode
S mode
SSM
rw
9
Doc ID 13902 Rev 9
for a list of abbreviations used in register descriptions.
SSI
rw
8
FIRST
LSB
rw
7
2
S mode since there is no data transfer
SPE
rw
6
rw
5
2
BR [2:0]
S mode)
rw
4
rw
3
MSTR
rw
2
CPOL
rw
1
RM0008
CPHA
rw
0