MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 832

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
USB on-the-go full-speed (OTG_FS)
832/995
Figure 281. B-device SRP
1. VBUS_VALID = V
1.
2.
3.
4.
5.
6.
B_VALID
DISCHRG_VBUS
SESS_END
DP
DM
CHRG_VBUS
B_VALID = B-peripheral valid session to PHY
DISCHRG_VBUS = discharge signal to PHY
SESS_END = session end signal to PHY
CHRG_VBUS = charge V
DP = Data plus line
DM = Data minus line
VBUS_VALID
To save power, the host suspends and turns off port power when the bus is idle.
The OTG_FS controller sets the early suspend bit in the Core interrupt register after 3
ms of bus idleness. Following this, the OTG_FS controller sets the USB suspend bit in
the Core interrupt register.
The OTG_FS controller informs the PHY to discharge V
The PHY indicates the session’s end to the device. This is the initial condition for SRP.
The OTG_FS controller requires 2 ms of SE0 before initiating SRP.
For a USB 1.1 full-speed serial transceiver, the application must wait until V
discharges to 0.2 V after BSVLD (in OTG_FS_GOTGCTL) is deasserted. This
discharge time can be obtained from the transceiver vendor and varies from one
transceiver to another.
The application initiates SRP by writing the session request bit in the OTG Control and
status register. The OTG_FS controller perform data-line pulsing followed by V
pulsing.
The host detects SRP from either the data-line or V
The PHY indicates V
The OTG_FS controller performs V
The host starts a new session by turning on V
OTG_FS controller interrupts the application by setting the session request success
status change bit in the OTG interrupt status register. The application reads the session
request success bit in the OTG control and status register.
When the USB is powered, the OTG_FS controller connects, completing the SRP
process.
Suspend
Low
BUS
valid signal from PHY
BUS
1
2
BUS
signal to PHY
3
power-on to the device.
Doc ID 13902 Rev 9
4
BUS
5
pulsing.
Data line pulsing
BUS
, indicating SRP success. The
BUS
6
BUS
pulsing, and turns on V
7
V
.
BUS
pulsing
8
Connect
BUS
RM0008
BUS
BUS
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.

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