MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 113

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
RM0008
7.2.10
7.3
7.3.1
31
15
Reserved
r
30
14
r
Bits 31:30
Clock-out capability
The microcontroller clock output (MCO) capability allows the clock to be output onto the
external MCO pin. The configuration registers of the corresponding GPIO port must be
programmed in alternate function mode. One of 8 clock signals can be selected as the MCO
clock.
The selected clock to output onto MCO must not exceed 50 MHz (the maximum I/O speed).
The selection is controlled by the MCO[3:0] bits of the
(RCC_CFGR).
RCC registers
Refer to
Clock control register (RCC_CR)
Address offset: 0x00
Reset value: 0x0000 XX83 where X is undefined.
Access: no wait state, word, half-word and byte access
Bit 29 PLL3RDY: PLL3 clock ready flag
PLL3
RDY
29
13
r
r
SYSCLK
HSI
HSE
PLL clock divided by 2 selected
PLL2 clock selected
PLL3 clock divided by 2 selected
XT1 external 3-25 MHz oscillator clock selected (for Ethernet)
PLL3 clock selected (for Ethernet)
PLL3
ON
28
12
rw
Section 1.1 on page 37
HSICAL[7:0]
r
Reserved, always read as 0.
Set by hardware to indicate that the PLL3 is locked.
0: PLL3 unlocked
1: PLL3 locked
PLL2
RDY
27
11
r
r
PLL2
ON
26
rw
10
r
PLLRDY PLLON
25
9
r
r
Doc ID 13902 Rev 9
Connectivity line devices: reset and clock control (RCC)
for a list of abbreviations used in register descriptions.
24
rw
8
r
23
rw
7
22
rw
6
Reserved
HSITRIM[4:0]
21
rw
5
Clock configuration register
20
rw
4
CSSON HSEBYP HSERDY HSEON
19
rw
rw
3
Res.
18
rw
2
HSIRDY
17
1
r
r
113/995
HSION
16
rw
rw
0

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