MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 728

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

USB on-the-go full-speed (OTG_FS)
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Bits 13:10 TRDT: USB turnaround time
Bits [7:3] Reserved
Bits [2:0] TOCAL: FS timeout calibration
Bit 9 HNPCAP: HNP-capable
Bit 8 SRPCAP: SRP-capable
Sets the turnaround time in PHY clocks.
Specifies the response time for a MAC request to the Packet FIFO controller (PFC) to fetch
data from the DFIFO (SPRAM).
They must be programmed to:
Note: Only accessible in Device mode.
The application uses this bit to control the OTG_FS controller’s HNP capabilities.
Note: Accessible in both Device and Host modes.
The application uses this bit to control the OTG_FS controller’s SRP capabilities. If the core
operates as a non-SRP-capable
B-device, it cannot request the connected A-device (host) to activate V
Note: Accessible in both Device and Host modes.
The number of PHY clocks that the application programs in this field is added to the full-speed
interpacket timeout duration in the core to account for any additional delays introduced by the
PHY. This can be required, because the delay introduced by the PHY in generating the line
state condition can vary from one PHY to another.
The USB standard timeout value for full-speed operation is 16 to 18 (inclusive) bit times. The
application must program this field based on the speed of enumeration. The number of bit
times added per PHY clock is 0.25 bit times.
0101: When the MAC interface is 16-bit UTMIFS
1001: When the MAC interface is 8-bit UTMIFS
0: HNP capability is not enabled.
1: HNP capability is enabled.
0: SRP capability is not enabled.
1: SRP capability is enabled.
Doc ID 13902 Rev 9
BUS
and start a session.
RM0008